Job Details

Sr. Engineer, Systems Modeling

Location: San Jose, CA (on site)

Ayar Labs is pioneering the next generation of optical interconnect technology. We're seeking a highly motivated Modeling Engineer to join our System Modeling Team and play a pivotal role in shaping the future of transceiver architectures. As a key contributor, you will drive the development and refinement of our cutting‑edge link modeling tools, collaborate closely with our analog mixed‑signal (AMS) and silicon photonics design teams, and leverage your expertise to optimize transceiver performance and predict manufacturing outcomes through advanced simulation techniques.

Essential Functions

• Optimize Transceiver Architectures: Partner with chip designers to refine and enhance transceiver architectures for optimal performance and manufacturability.
• Model Development: Develop and maintain behavioral models for analog and mixed‑signal circuits using Verilog‑A to support system‑level simulations.
• Advance Link Modeling Infrastructure: Contribute your technical skills to the ongoing development and enhancement of our proprietary link modeling tools.
• Lead Simulation Efforts: Execute and analyze Monte Carlo simulations on our Slurm cluster to predict manufacturing yields and establish robust component specifications.
• Refine Simulation Parameters: Maintain and update parameter distributions within our Monte Carlo simulation framework to ensure accuracy and relevance.
• Analyze and Correlate Data: Apply statistical analysis to correlate simulation results with real‑world measurements, driving continuous improvement.
• Provide Expert Guidance: Offer link modeling support and expertise to AMS and optics design groups, facilitating the simulation of next‑generation transceiver architectures.
• Set Component Specifications: Establish precise specifications for photonic and electronic transceiver components based on your insightful link modeling studies.

Basic Qualifications

• Master's degree in Optics/Photonics, Physics, Computer Science, Electrical Engineering, or a related field.
• 2+ years of demonstrated experience in electrical engineering or a closely related field.
• Comprehensive understanding of high‑speed electrical and/or optical links.
• In‑depth knowledge of high‑speed electrical links, optical transceivers, silicon photonic devices, and optical test/measurement methodologies.
• Strong background in signal processing principles and techniques.
• Proficiency in behavioral modeling using languages such as Verilog‑A, including knowledge of design methodologies for mixed‑signal simulation.
• Familiarity with Ethernet standards and electrical link standards (e.g., PCIe5/6, JESD204c).
• Prior experience in the design and simulation of PIC components, large‑scale integrated systems, or optical transceiver products would be a significant asset.
• Hands‑on experience with Slurm clusters and the ability to parallelize large‑scale workloads.
• Strong proficiency in Python for scientific computing and data analysis.
• Knowledge with modern version control systems (e.g., Git).
• Exceptional problem‑solving and analytical abilities.
• Meticulous attention to detail and commitment to accuracy.
• Ability to thrive both independently and as part of a collaborative team.
• Excellent communication and interpersonal skills to effectively convey technical concepts.

Salary range: $150,000-$192,000

Ayar Labs is an affirmative action/equal opportunity employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.